1. Field of the Invention
The present invention relates to an analog-differential-circuit test device and, more particularly, to a test device for testing an analog differential circuit such as a differential amplifier.
2. Description of the Related Art
In recent years, LSIs include an analog differential circuit such as a current-mode-logic (CML) circuit in place of a conventional CMOS circuit because of achieving a higher-speed operation as well as a follow-up capability for power source fluctuation. In general, the analog differential circuit has a property that a DC characteristic easily changes due to variation of process conditions used in manufacturing transistors in the analog differential circuit. The term “DC characteristic” as used herein includes a High-output input characteristic, i.e., the behavior of the analog differential circuit by which an input voltage difference causes the analog differential circuit to assume a H-level output especially in the vicinity of a signal transition to a low level, and a Low-output input characteristic, i.e., the behavior of the analog differential circuit by which an input voltage difference causes the analog differential circuit to assume a L-level especially in the vicinity of a signal transition to a high level.
For the reason as described above, there is a request to attempt to measure and analyze the DC characteristic of the analog differential circuit in the LSI. However, unless input and output of the analog differential circuit are directly connected to input and output terminals, respectively, of the LSI, it is difficult to measure and analyze the characteristic of the analog differential circuit itself.
Conventionally, operation of the analog differential circuit in the LSI has been tested in a functional test of a combinational circuit in a higher-order level configuration including the differential circuit. For example, Patent Publication JP-A-2001-133519 describes such a test circuit. However, it is desired that accuracy of the inspection and analysis be improved by testing and analyzing the differential circuit in a lower-order level circuit configuration.